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 ASAHI KASEI
[AKD4112B-B]
AKD4112B-B
AK4112B Evaluation Board Rev.0
GENERAL DESCRIPTION AKD4112B-B is the evaluation board for AK4112B, 96kHz digital audio receiver. This board has optical, cannon connector and BNC connector to interface with other digital audio equipment. Ordering guide
AKD4112B-B --- Evaluation board for AK4112B (A cable for connecting with printer port of IBM-AT compatible PC and a control software are packed with this.)
FUNCTION Digital interface -S/PDIF : 4 channel input (optical or BNC) 1 channel output (optical or BNC) - Serial audio data I/F : 1 output (for DIR data output. 10-pin port) -Serial control data I/F 1 input/output port (10-pin port)
5V Opt RX1 REG 3.3V GND Control
RX2 RX4 Opt TX0
AK4112B
Serial Data out (For DIR)
Figure 1. AKD4112B-B Block Diagram *Circuit diagram and PCB layout are attached at the end of this manual.
-1-
2005/10
ASAHI KASEI
[AKD4112B-B]
Evaluation Board Manual
Operating sequence (1) Set up the power supply lines. [+ 5V] (Red) = 5V [GND] (Black) = 0V (2) Set up the evaluation mode and jumper pins. (Refer to the following item.) (3) Connect cables. (Refer to the following item.) (4) Power on. The AK4112B should be reset once bringing PDN(SW2) "L" upon power-up.
Evaluation modes (1) Evaluation for DIR S/PDIF in (optical or BNC) - AK4112B - Serial Data out (10pin port)
MCLK BICK LRCK SDTO
S/PDIF
Optical, XLR or BNC connector
AK4112B (DIR)
PORT2 (10pin Header)
MCLK BICK LRCK SDTO
DAC
AKD4112B-B
The DIR generates MCLK, BICK and LRCK SDTO from the received data through optical connector(PORT1: TORX176) or BNC connector. The AKD4112B-B can be connected with the AKM's DAC evaluation board via 10-line cable. a. Set-up of Bi-phase Input RX1 and RX2-4 should not select BNC connector at the same time. a-1. RX1 Connector JP2(RX1) Optical (PORT1) OPT BNC (J2) BNC Table 1. Set-up of RX1 a-2. RX2, 3 and 4 can be inputted from a BNC (J2) connector only. Only RX1 can be used in parallel mode. a-2-1. Set-up of the jumper on the sub board. JP21 JP22 Mode JP19 RX3 RX4 Serial mode RX2 DIF1 DIF2 Parallel mode DIF0 Table 2. Set-up of the Jumper on the sub board
-2-
2005/10
ASAHI KASEI
[AKD4112B-B]
a-2-2. Set-up of the jumper on the main board. RX3 RX4 RX2 JP6 JP7 JP5 JP Short RX4 Short The jumper, which selects the Rx channel, should be Short. Table 3. Set-up of RX2, 3 and 4 Input a-3. Set-up of AK4112B input path It sets up IPS1-0 bits in serial mode. IPS1 bit 0 0 1 1 IPS0 bit INPUT Data 0 RX1 Default 1 RX2 0 RX3 1 RX4 Table 4. Recovery Data Select (Serial)
b.
Set-up of clock input and output The signal level outputted/inputted from PORT2 is 3.3V.
MCLK SDTO LRCK BICK PORT2 DIR 1
5
GND
GND
GND
Figure 2. PORT2 pin layout b-1. MCKO1/MCKO2 The output of MCKO1 pin or MCKO2 pin can be selected by JP12. The output frequency of MCKO1/MCKO2 is selected by OCKS 1-0. Output JP12 signal Default MCKO1 MCKO1 MCKO2 MCKO2 Table 5. MCKO1/MCKO2 set-up
OCKS1 pin (SW3_2) OCKS1 bit 0 0 1 1
OCKS0 pin (SW3_3) OCKS0 bit 0 1 0 1
(X'tal)
MCKO1
NC
10
GND
6
MCKO2
fs (max) 108 kHz 108 kHz 54 kHz Default
256fs 256fs 256fs 256fs 256fs 128fs 512fs 512fs 256fs Table 6. Master Clock Frequency Select
-3-
2005/10
ASAHI KASEI
[AKD4112B-B]
b-2. Set-up of BICK and LRCK input and output Please select SW 3_7 (DIR_I/O) according to the setup of audio format of AK4112B (Refer to Table 7). Output signal SW3_7 (DIR_I/O) Slave mode 0 Master mode 1 Table 7. DIR_I/O set-up c. Set-up of Audio data format It sets up by SW 1_2, SW 1_3 and SW1_4 in parallel mode. Please set up DIF2-0 bit in serial mode. Mode 0 1 2 3 4 5 6 7 DIF2 pin (SW1_4) DIF2 bit 0 0 0 0 1 1 1 1 DIF1 pin (SW1_3) DIF1 bit 0 0 1 1 0 0 1 1 DIF0 pin (SW1_2) DIF0 bit 0 1 0 1 0 1 0 1 DAUX 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, I2S 24bit, Left justified 24bit, I2S SDTO 16bit, Right justified 18bit, Right justified 20bit, Right justified 24bit, Right justified 24bit, Left justified 24bit, I2S 24bit, Left justified 24bit, I2S LRCK I/O H/L H/L H/L H/L H/L L/H H/L L/H O O O O O O I I 64fs 64fs 64fs 64fs 64fs 64fs 64128fs 64128fs BICK I/O O O O O O O I I Default
Default
Table 8. Audio data format d. Set-up of CM1 and CM0 The operation mode of PLL is selected by CM1 and CM0. In parallel mode, it can be selected by SW3_1 and JP18. In serial mode, it can be selected by CM1-0 bits. CM1 pin (SW3_1) CM1 bit 0 0 1 1 CM0 pin (JP18) CM0 bit 0 (CM0="L") 1 (CDTO/CM0="H") 0 (CM0="L") 0 1 ON OFF ON ON ON (Note) ON ON ON Clock source PLL (RX) X'tal PLL (RX) X'tal SDTO source RX DAUX RX DAUX Default
(UNLOCK)
PLL
X'tal
1 ON ON X'tal DAUX (CDTO/CM0="H") ON: Oscillation (Power-up), OFF: STOP (Power-Down) Note: When the X'tal is not used as clock comparison for fs detection (XTL0, 1= "1,1"), the X'tal is OFF. Table 9. Clock Operation Mode Select
-4-
2005/10
ASAHI KASEI
[AKD4112B-B]
(2) Evaluation for TX S/PDIF in (optical or BNC)- AK4112B - S/PDIF out (optical or BNC) a. Set-up of a Bi-phase output signal As for TX, only the loop back mode of RX corresponds. In serial mode, it can be selected by OPS1-0 bits. This mode is not supported in parallel mode. Connector JP13 (TX) Optical (PORT4) OPT BNC (J4) BNC Table 10. Set-up of TX
Serial control
The AK4112B can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT6 (uP-I/F) with PC by 10-line flat cable packed with the AKD4112B-B. Take care of the direction of connector. There is a mark at pin#1. The pin layout of PORT6 is as Figure 3.
Mode Parallel Serial
SW1_6 JP18 H CDTO/CM0="H" or CM0="L" L SDA and CM0="L" short Table 11. Set-up of parallel mode and serial mode
GND GND GND GND GND PORT6 uP I/F 2
10
1
Figure 3. PORT6 pin layout This evaluation board encloses control software. A software operation procedure is included in an evaluation board manual.
-5-
CDTO
CCLK CSN
CDTI
NC
9
2005/10
ASAHI KASEI
[AKD4112B-B]
Toggle switch set-up SW2 PDN Reset switch for AK4112B. Set to "H" during normal operation. Bring to "L" once after the power is supplied.
LED indication LE1 INT0 LE2 INT1
Bright when ERF pin goes to "H". Bright when AUTO pin goes to "H".
DIP switch (SW1) set-up: -off- means "L" Switch No. Function Name 1 IPS0 Don't care 2 DIF0 Set-up of DIF0 pin. ( parallel mode) 3 DIF1 Set-up of DIF1 pin. (parallel mode) 4 DIF2 Set-up of DIF2 pin. (parallel mode) 5 IPS1/IIC Don't care Set-up of P/SN pin. "OFF": Serial mode, "ON": parallel mode 6 P/SN 7 TEST Don't care 8 ACKS Don't care DIP switch (SW3) set-up: -off- means "L" Switch No. Function Name 1 CM1 Set-up of CM1 pin. (parallel mode) 2 OCKS1 Set-up of OCKS1 pin. (parallel mode) 3 OCKS0 Set-up of OCKS0 pin. (parallel mode) 4 PSEL Don't care 5 XTL0 Don't care 6 XTL1 Don't care Set-up of the transmission direction of 74AC245 DIR_I/O 7 "OFF": When inputting from PORT2, "ON": When outputting from PORT2 8 DIT_I/O Don't care
Default OFF OFF OFF OFF OFF OFF OFF OFF
Default OFF OFF OFF OFF OFF OFF ON OFF
-6-
2005/10
ASAHI KASEI
[AKD4112B-B]
Jumper set up. No. Jumper Name 1 D3V/VD
2 5,6,7 11,12
RX1 RX2-4 DIR MCLK , DIT MCLK TX0
13
18
SDA/CDTO
19 (Sub)
RX2/DIF0
21 (Sub)
RX3/DIF1
22 (Sub)
RX4/DIF2
Function Set-up of Power supply source for 74AC245. D3V : D3V (default) VD : VD Set-up of RX1 input circuit. OPT : Optical (default) BNC : BNC Set-up of RX2-4 input circuit. MCKO set-up for PORT5(DIT) and PORT2(DIR) MCKO1 : MCKO1 of AK4112B (default) MCKO2 : MCKO2 of AK4112B Set-up of TX0 output circuit. OPT : Optical (default) BNC : BNC Set-up of CM0 and Serial mode. Parallel: CM0="L"short CM0 pin="L" CDTO/CM0="H"short CM0 pin="H" Serial : SDA and CM0="L"short (default) Set-up depending serial/parallel mode RX2: Serial mode (default) DIF0: Parallel mode Set-up depending serial/parallel mode RX3: Serial mode (default) DIF1: Parallel mode Set-up depending serial/parallel mode RX4: Serial mode (default) DIF2: Parallel mode
-7-
2005/10
ASAHI KASEI
[AKD4112B-B]
Control Software Manual Set-up of evaluation board and control software
1. Set up the AKD4112B-B according to previous term. 2. Connect IBM-AT compatible PC with AKD4112B-B by 10-line type flat cable (packed with AKD4112B-B). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000/XP. Please refer "Installation Manual of Control Software Driver by AKM device control software". In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled "AKD4112B-B Evaluation Kit" into the CD-ROM drive. 4. Access the CD-ROM drive and double-click the icon of "akd4396.exe" to set up the control program. 5. Then please evaluate according to the follows.
Operation flow
Keep the following flow. 1. Set up the control program according to explanation above. 2. Click "Port Reset" button.
Explanation of each buttons
1. [Port Reset] : 2. [Write default] : 3. [All Write] : 4. [Function1] : 5. [Function3] : 6. [Function4] : 7. [Function5]: 8. [SAVE] : 10. [OPEN] : 11. [Write] : Set up the USB interface board (AKDUSBIF-A) . Initialize the register of AK4112B. Write all registers that is currently displayed. Dialog to write data by keyboard operation. The sequence of register setting can be set and executed. The sequence that is created on [Function3] can be assigned to buttons and executed. The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. Save the current register setting. Write the saved values to all register. Dialog to write data by mouse operation.
Indication of data
Input data is indicated on the register map. Red letter indicates "H" or "1" and blue one indicates "L" or "0". Blank is the part that is not defined in the datasheet.
-8-
2005/10
ASAHI KASEI
[AKD4112B-B]
Explanation of each dialog 1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register. Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes "H" or "1". If not, "L" or "0". If you want to write the input data to AK4112B, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog] : Dialog to write data by keyboard operation
Address Box: Input registers address in 2 figures of hexadecimal. Data Box: Input registers data in 2 figures of hexadecimal. If you want to write the input data to AK4112B, click [OK] button. If not, click [Cancel] button.
3. [Save] and [Open] 3-1. [Save]
Save the current register setting data. The extension of file name is "akr".
(Operation flow)
(1) Click [Save] Button. (2) Set the file name and push [Save] Button. The extension of file name is "akr". 3-2. [Open] The register setting data saved by [Save] is written to AK4112B. The file type is the same as [Save].
(Operation flow)
(1) Click [Open] Button. (2) Select the file (*.akr) and Click [Open] Button.
-9-
2005/10
ASAHI KASEI
[AKD4112B-B]
4. [Function3 Dialog]
The sequence of register setting can be set and executed. (1) Click [F3] Button. (2) Set the control sequence. Set the address, Data and Interval time. Set "-1" to the address of the step where the sequence should be paused. (3) Click [Start] button. Then this sequence is executed. The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step. This sequence can be saved and opened by [Save] and [Open] button on the Function3 window. The extension of file name is "aks".
Figure 4. Window of [F3]
- 10 -
2005/10
ASAHI KASEI
[AKD4112B-B]
5. [Function4 Dialog]
The sequence that is created on [Function3] can be assigned to buttons and executed. When [F4] button is clicked, the
window as shown in Figure 5 opens.
Figure 5. [F4] window
- 11 -
2005/10
ASAHI KASEI
[AKD4112B-B]
5-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks). The sequence file name is displayed as shown in Figure 6.
Figure 6. [F4] window(2) (2) Click [START] button, then the sequence is executed.
5-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The sequence file names can assign be saved. The file name is *.ak4. [OPEN] : The sequence file names assign that are saved in *.ak4 are loaded.
5-3. Note
(1) This function doesn't support the pause function of sequence function. (2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change.
- 12 -
2005/10
ASAHI KASEI
[AKD4112B-B]
6. [Function5 Dialog] The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. When [F5] button is clicked, the following window as shown in Figure 7opens.
Figure 7. [F5] window
6-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr).
(2) Click [WRITE] button, then the register setting is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The register setting file names assign can be saved. The file name is *.ak5. [OPEN] : The register setting file names assign that are saved in *.ak5 are loaded.
6-3. Note
(1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in order to reflect the change.
- 13 -
2005/10
ASAHI KASEI
[AKD4112B-B]
Revision History Date (YY/MM/DD) 05/10/03 Manual Revision KM080200 Board Revision 0 Reason First Edtion Contents
IMPORTANT NOTICE * These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. * AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. * Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. * AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. * It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.
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2005/10
5
4
3
2
1
CN3
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
INT1
CM1/CDTI/SDA
OCKS0/CSN/CAD
OCKS1/CCLK/SCL
CM0/CDTO/CAD1
INT0
33
D
INT0 INT1
D
CN4 CN2 49 1 1 + 2 C20 0.1u 2 51 TVDD 52 AVDD V/TX
C
U1 DVDD CM0/CDTO 28 32
50
C19 10u 10u C21
DVSS
CM1/CDTI
27
31
2
0.1u C22 3 TVDD OCKS1/CCLK 26
1
53
P/SN
P/SN 2 C23 5 X1 1 C24 6 XTO MCKO2 23 27 XTI MCKO1 24 28
54
5p
55
5p
11.2896MHz
7 PDN DAUX 22 26
56
57 1
58
RX1 C25 10u
+ 2
59 11 60
B
RX2 RX2 1 DIF0 3 JP19 2 FS96 12 RX2/DIF0 FS96 17 TVDD TVDD 21
B
61
62
RX3 RX4 1 DIF2 3 JP22 2 14 RX4/DIF2 AUTO 15 19 INT1 18
63
64
IPS/RX4 17
DIF0/RX5
DIF1/RX6
PDN
DAUX
BICK
SDTO
MCKO1
1
2
3
4
5
6
7
8
9
10
11
MCKO2
12
13
14
15
16
LRCK
A
DIF2/RX7
CN1
5
4
+
30
4
V/TX
OCKS0/CSN
25
29
C
R61 8 18k 9 C26 0.1u AVDD SDTO 20 R BICK 21
25
24
10
AVSS
LRCK
19 TXO
23
RX1
ERF
18
V/TX INT0
22
RX3 1 DIF1 3
JP21 2
13
RX3/DIF1
P/SN
16
20 P/SN
AK4112B
A
Title Size A3 Date:
3 2
AKD4112B-B
Document Number Rev
SUB
Tuesday, October 11, 2005 Sheet
1
1
3 of 3
5
4
3
2
1
CN4
For U6
VD D3V
For U1, U2, U5
D3V VD
JP1 1 D3V 2 3 VD
PORT1
For U3, U4
D3V/VD
6 5
6 5
GND VCC GND OUT
4 3 2 1
L1 1 C7 1 C8 +
10u
2 VD
49 50 R1 JP2 51 OPT XLR BNC 1 3 5 2 4 6 AVDD P/SN/ANS ACKS AVDD 52
D
C1
C2 C3 C4
C5
C6
0.1u
D
0.1u0.1u0.1u
0.1u 0.1u
2
TORX176
0.1u
10u
470
P/SN/ANS
53 54 55
T2 LP2950A R3 GND AVDD 1 1 OUT IN 3
ACKS
+5V L2 1 R4 VD
10u
2 TVDD/VDD RX1
short
+ 2
C11 47u
56 57
2
short
T3 TA48M033F R6 DVDD 1 OUT GND 2 IN 1 1 2 3 4 5
J2
RX0
1 R5
C13 58
75
0.1u
AVDD JP5 1 2 JP6 1 2 JP7 1 RX4 2 3 IPS0
AVDD
59 60 61
short
R7 OVDD
+ 2
2
C14 47u
+ 3
RX2
C15 47u
short
C
R8 D3V
short
RP1 9 8 7 6 5 4 3 2 1 47k
IPS0 DIF0 DIF1 DIF2/XSEL IPS1/IIC P/SN/ANS TEST ACKS
SW1
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 D3V
RX3
62 63 64
C
AVDD
AVDD
IPS0/RX4 JP8 1 RX5 2 3 DIF0 IPS1/IIC P/SN/ANS TEST ACKS DIF0/RX5 JP9 1 RX6 2 3 DIF1 JP10 1 RX7 2 3 DIF2/XSEL R9 D3V K
CN1 1 2 3 4 5 6
B
TEST
TEST
DIF1/RX6
PDN
DIF2/XSEL/RX7
D3V 16 U1
B
10k
D3V 14 14
DVDD VIN
DVDD
EMCK1
7
4Y GND
7
2 3 5 6 11 10 14 13 15 1
1A 1B 2A 2B 3A 3B 4A 4B G A/B
D3V
1Y 2Y 3Y
4 7
D1 1S1588
A
VIN
9 12
100 100
R11 R12
1
U2A 74HC14 2
3
U2B 74HC14 4
7 8 9
R10
DAUX2
DAUX
EMCK2 DAUX2 SW2
1
3
H
L
100
C16
100k
PDN
0.1u
2
JP11 1 3
MCKO1 2 MCKO2
MCKO1 MCKO MCKO2
10 11 12 13
8
74LVC157
DIT_MCLK DIR_MCLK
D3V/VD PORT2 10 9 8 7 6 20 JP12 MCKO1 1 2 3 MCKO2
100 100 100
R13 R14 R17 R19 R21
OVDD
OVDD
GND GND GND GND NC
1 2 3 4 5
MCLK BICK LRCK SDTO DAUX R22 R23
DIR
A
100k
100k
47k 47k 47k 47k 47k 47k
R70 R71 R72 R73 R74 R75
B0 B1 B2 B3 B4 B5 B6 B7
D3V/VD
100 100 100 100
R15 R16 R18 R20
U3 18 17 16 15 14 13 12 11
A0 A1 A2 A3 A4 A5 A6 A7 DIR OE
2 3 4 5 6 7 8 9 1 19
BICK
14 15 16
A
47k 47k 47k 47k 47k 47k
R76 R77 R78 R79 R80 R81
100 100
SDTO
LRCK
10
74AC245
GND
DIR_I/O
Title Size A3 Date: Document Number
AKD4112B-B
Rev
MAIN
Wednesday, June 29, 2005 Sheet
1
0
1 of 2
5
4
3
2
5
4
3
2
1
CN2 GND T45_BK +5V T45_BK C 1 1 18 19 20
D
B
17
U
+5V VOUT
D
JP13
PORT4
5 6 5 6 IN VCC IF GND 4 3 2 1 VD
TX0
1 3
TVDD/VDD
TVDD
21 22 23 24
OPT 2 BNC
TX0
TOTX176
R33 1k
C17
0.1u
J4
T5
TX0
2 3 4 5 1
DA02-F
4 8 R37 1 1:1 5
R36 25
240
26 27 28 29 OVDD OVDD 30 31 32
150
C
C
14
CN3 U2C 5 EMCK2 EMCK 33 34 INT0 U2D 9 INT1 D3V R48 VD U5 16 CM0/CDTO/CAD1 1Y 2Y 3Y 4Y GND 4 7 9 12 1 74LS07 7 R57 R50 R53 VD U6A OCKS0/CSN/CAD0 2 DVDD DVDD 40 41 42 R59 R60 43 IPS1/IIC IPS1/IIC 44 45 46 47 48 12 74LS07 7
A
LE1 A K
R45 6
INT0
1k
14 7 74HC14
35 36 37 38
B
LE2 D3V A K
R47 8
INT1
1k
7 74HC14
B
U2E 11
14
R51 R54 10 PORT6 10 8 6 4 2 12 9 7 5 3 1
10k 10k
R52 R55
470 470
14 7
74HC14 U2F 13 74HC14 7
CSN R56 SCL/CCLK SDA/CDTI 51 SDA(ACK)/CDTO
1A 1B 2A 2B 3A 3B 4A 4B G A/B
D3V
10k
R49
470
2 3 5 6 11 10 14 13 15 1
100 100
CM1/CDTI/SDA
OCKS1/CCLK/SCL
P/SN/ANS
uP-I/F
R58 D3V CM1/FS1 OCKS1/FS2 OCKS0/FS0 PSEL XTL0/CKS1 XTL1/TRANS DIR_I/O DIT_I/O RP2 9 8 7 6 5 4 3 2 1 47k JP18 1 SDA 3 CDTO/CM0=H 5 D3V 2 4 6
8
74LVC157
10k
14
39
SW3
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 D3V
10k
100
CM0=L
SDA/CDTO
100
PSEL D3V/VD
XTL0
XTL1
A
3 DIR_I/O DIT_I/O
U6B 4 74LS07 7
9
U6D 8 74LS07 7
U6F 13
5
U6C 6 74LS07 7
11
U6E 10 74LS07 7
Title Size A3 Date:
2
AKD4112B-B
Document Number Rev
MAIN
Wednesday, June 29, 2005 Sheet
1
0
2 of 2
5
4
3


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